1. Technical Field
The present invention relates to conductive lines of a semiconductor device, and more particularly, to a method for preventing damage to a conductive line during fabrication of a semiconductor device.
2. Related Art
As sizes of conductive lines of semiconductor devices are designed below sub-micron ranges, such as AlCu at about 0.1 μm, it is difficult to protect sidewalls of metal lines (ML) during fabrication processing. One solution includes using a heavy polymer gas flow during ML etch processing to protect the sidewall of the ML lines against damage. However, this solution results in producing ML lines having wider bottom portions and suffers from a tight overlay window of adjacent ML line formation. Conversely, in an attempt to relieve the overlay window problem, a light polymer gas flow is used to protect the sidewall of the ML lines against etching damage.
FIGS. 1A-1C are schematic cross-sectional views of a conventional method for fabricating conductive lines of a semiconductor device using the light polymer gas flow. In FIG. 1A, a basic stacked structure 1 includes an oxide layer 10, a lower barrier TiN/Ti layer 20, an Al—Cu layer 30, an upper barrier layer TiN/Ti 40, a TEOS layer 50, a bottom antireflective coating layer 60, and a photoresist layer 70. Here, the photoresist layer 70 has been patterned.
In FIG. 1B, the stacked structure 1 (in FIG. 1) is etched and processed, thereby patterning the TEOS layer 50. Accordingly, the stacked structure 1 (in FIG. 1A) is processed to form an etched stacked structure 2.
In FIG. 1C, the etched stacked structure 2 (in FIG. 1B) is dry etched and processed, thereby producing the metal line structure 3. Here, the metal line structure 3 includes a plurality of conductive lines 32 mutually separated by trenches 14 formed through an upper surface of the oxide layer 12, thereby forming lower TiN/Ti barriers 22, the conductive lines 32, the upper TiN/Ti barriers 42, and the TEOS caps 52.
As shown in FIG. 1C, by using the light polymer gas flow during final etch processes, notches 34 are formed around lower portions of the conductive lines 32 during etching of the lower TiN/Ti barrier layer 20 (in FIG. 1B). Accordingly, the conductive lines 32 are significantly damaged. Thus, each of the conductive lines 32 are mechanically weakened at the interface with corresponding ones of the lower TiN/Ti barriers 22.
Thus, a method is required that can prevent notch formation of conductive lines during etching processing, and provide adequate relief of the overlay window.